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Cadence Expands Intel Foundry Collaboration, Boosts HBM4 IP Portfolio Amid AI Chip Demand
Cadence Design Systems (NASDAQ: CDNS) announced on June 8 2026 that it had broadened its partnership with Intel Foundry to speed the rollout of Intel’s 14A process technology. The multi‑year deal marries Cadence’s agentic, AI‑driven electronic design automation (EDA) tools and intellectual property (IP) with Intel’s advanced manufacturing platform. Together, the alliance aims to help customers design faster, more efficient chips for high‑bandwidth memory (HBM)‑intensive workloads such as AI training and high‑performance computing (HPC).
The announcement follows Cadence’s launch of its industry‑first HBM4 IP solution on April 17 2025. The 12.8 Gbps memory interface is the fastest HBM4 implementation currently available and is engineered to meet the escalating bandwidth demands of system‑on‑chip (SoC) designs that target next‑generation AI and HPC workloads. The offering covers a full stack—PHY, controller, interposer, and package—optimised for low power consumption and minimal physical footprint.
Cadence’s expanded collaboration with Intel fits into a growing trend of design‑technology co‑optimization (DTCO) between EDA vendors and foundries. The company’s agentic AI flows are designed to lower design risk and shorten time‑to‑market for users of Intel’s 14A process, which is slated to support both mobile and HPC applications. The agreement also covers IP readiness and design enablement, allowing Cadence to tailor its tools to the specific characteristics of Intel’s next‑generation nodes.
The partnership dovetails with Intel’s strategy to strengthen its foundry services. Intel’s 14A process, scheduled for mass production in 2029, is positioned to compete in both mobile and high‑performance markets. By integrating Cadence’s AI‑driven design flows early in the process development cycle, Intel can accelerate the availability of optimised libraries and reduce the time required for customers to bring products to market. The collaboration also supports Intel’s broader goal of offering end‑to‑end solutions that combine silicon, software, and IP.
Analyst sentiment around Cadence has remained upbeat. Wells Fargo analyst Joseph Quatrochi reaffirmed a Buy rating on the company on June 1 2026 and set a target price of $425 per share. Earlier in the month, Berenberg analyst Nay Soe lifted Cadence’s target price from $400 to $440 on May 27 2026, citing the firm’s strong position in the HBM value chain. With the stock’s recent performance approaching the Berenberg target, the company still enjoys roughly 12 % upside.
The HBM4 standard, adopted by JEDEC in April 2025, has become a critical component of AI data‑center infrastructure. Demand for HBM has outpaced the supply of commodity DRAM, driving price increases and supply constraints that have rippled through consumer and enterprise markets. Cadence’s IP and EDA solutions are positioned to help chip designers navigate these constraints by providing high‑performance, low‑power memory interfaces that integrate seamlessly with advanced process technologies.
In short, Cadence Design Systems is deepening its relationship with Intel Foundry to co‑optimize the 14A process while expanding its HBM4 IP portfolio to serve the AI and HPC markets. Analyst sentiment remains bullish, with updated target prices reflecting confidence in Cadence’s product pipeline and market positioning. No regulatory actions or court proceedings have been reported, and the company continues to focus on delivering design tools that enable faster, more efficient chip development.
The announcement follows Cadence’s launch of its industry‑first HBM4 IP solution on April 17 2025. The 12.8 Gbps memory interface is the fastest HBM4 implementation currently available and is engineered to meet the escalating bandwidth demands of system‑on‑chip (SoC) designs that target next‑generation AI and HPC workloads. The offering covers a full stack—PHY, controller, interposer, and package—optimised for low power consumption and minimal physical footprint.
Cadence’s expanded collaboration with Intel fits into a growing trend of design‑technology co‑optimization (DTCO) between EDA vendors and foundries. The company’s agentic AI flows are designed to lower design risk and shorten time‑to‑market for users of Intel’s 14A process, which is slated to support both mobile and HPC applications. The agreement also covers IP readiness and design enablement, allowing Cadence to tailor its tools to the specific characteristics of Intel’s next‑generation nodes.
The partnership dovetails with Intel’s strategy to strengthen its foundry services. Intel’s 14A process, scheduled for mass production in 2029, is positioned to compete in both mobile and high‑performance markets. By integrating Cadence’s AI‑driven design flows early in the process development cycle, Intel can accelerate the availability of optimised libraries and reduce the time required for customers to bring products to market. The collaboration also supports Intel’s broader goal of offering end‑to‑end solutions that combine silicon, software, and IP.
Analyst sentiment around Cadence has remained upbeat. Wells Fargo analyst Joseph Quatrochi reaffirmed a Buy rating on the company on June 1 2026 and set a target price of $425 per share. Earlier in the month, Berenberg analyst Nay Soe lifted Cadence’s target price from $400 to $440 on May 27 2026, citing the firm’s strong position in the HBM value chain. With the stock’s recent performance approaching the Berenberg target, the company still enjoys roughly 12 % upside.
The HBM4 standard, adopted by JEDEC in April 2025, has become a critical component of AI data‑center infrastructure. Demand for HBM has outpaced the supply of commodity DRAM, driving price increases and supply constraints that have rippled through consumer and enterprise markets. Cadence’s IP and EDA solutions are positioned to help chip designers navigate these constraints by providing high‑performance, low‑power memory interfaces that integrate seamlessly with advanced process technologies.
In short, Cadence Design Systems is deepening its relationship with Intel Foundry to co‑optimize the 14A process while expanding its HBM4 IP portfolio to serve the AI and HPC markets. Analyst sentiment remains bullish, with updated target prices reflecting confidence in Cadence’s product pipeline and market positioning. No regulatory actions or court proceedings have been reported, and the company continues to focus on delivering design tools that enable faster, more efficient chip development.
